Modem chips such as Dynamic Random Access Memory (DRAM) chips usually comprise several power supply systems, with each supply voltage being regulated to its nominal value. For good circuit performance (e.g., speed), it is desirable to have high voltage levels for these supply voltages for handling variable current loads. However, higher voltage levels also have undesired effects. Current consumption increases, and the potential life span of the circuit decreases. Therefore, a nominal value for each supply voltage has to be a compromise between these conflicting requirements. The generator circuits usually keep their supply voltage at their output close to the nominal value, even under load conditions. However, between the generator and the circuit that is being supplied, a significant voltage drop can occur due to the resistance of the power bus.
Referring now to FIG. 1, there is shown typical block diagram of a prior art exemplary chip 10, such as a VINT generator system of a Dynamic Random Access Memory chip. The chip 10 comprises four areas 12 (shown as dashed line rectangles) adjacent each comer of the chip 10, two horizontal buses in a "spine" section 18 and two vertical buses 14 in an "arm" section 19 which are coupled together at the center of the chip 10, and a plurality of generators or regulators of which an exemplary eight generators 16A-16H are shown. The generators 16A-16H are arbitrary located along the horizontal buses 14 in the "spine" section 18. The buses 14 in the "spine" section 18 and in the "arm" section 19 are coupled to various circuits (not shown) located in the four areas 12 and in the "spine" and "arm" sections. The arrangement of FIG. 1 shows an exemplary DRAM chip 10 where the various circuits in the areas 12 comprise memory circuits (not shown). Due to the fact that all of the generators 16A-16H are located in the "spine" section 18, a stable supply voltage can be guaranteed in the "spine" section 18 under all load conditions. However, certain load conditions (operation modes) of the chip 10 can occur in which a large current is consumed in the "arm" section 19. In this case a significant voltage drop occurs between the "spine" section 18 and circuits supplied in the "arm" section 19.
Referring now to FIG. 2, there is graphically shown exemplary curves of voltage (volts) on the vertical axis versus time in nanoseconds on the horizontal axis, with a first curve 22 representing exemplary measurements that may be found near a central point where the "spine" and "arm" sections 18 and 19 meet near the generators 16C-16F on the prior art chip 10 of FIG. 1, and a second curve 24 representing exemplary measurements that may be found at an end point in the "arm" section 19 of the prior art chip 10 of FIG. 1. A current load (not shown in FIG. 1) that is located at the end of the "arm" section 19 is turned on at a the time of 10 nanoseconds (ns) and turned off at 300 ns in FIG. 2. After an initial voltage drop shown at approximately 35 ns for curve 22, the generator regulates the voltage at its output back to almost its nominal value. At the point of the current load shown by curve 24, the regulated voltage is seen to drop to a value of approximately 100 millivolts (mV) below the nominal value shown in curve 22. Still further, the initial voltage drop in the curve 24 is 100 mV lower than that found at the output of the generator.
Theoretically, it is possible to size the power bus 14 into the "arm" section 19 in a way that the resistive voltage drop is kept at a minimum. However, this results in unfeasible large dimensions for the power bussing of the "arm" section 19. Another theoretical possibility is to place generator or regulator circuits in the "arm" section 19 so that they are closer to the supplied circuits. However, due to space and floor-planning conditions on the chip 10, this is also not feasible. A third possibility is to set the nominal voltage level higher by an amount of the maximum resistive voltage drop found in the "arm" section 19. This, however, would conflict with reliability and current requirements on the chip 10.
It is desirable to provide method and apparatus for a generator system on a chip for overcoming resistive voltage drops on power supply lines by rapidly reacting to increased current consumption while not reducing the reliability of a circuit coupled to the power supply lines without the disadvantages caused by a general voltage increase.